Working Ninja
Linux on MacBook - Power On After Power Failure


Enable the "Start up automatically after a power failure" feature found within OS X without OS X installed.


  1. Find the LPC controller via lspci.
  2. Reference the LPC controller datasheet to find the register to update.
  3. Update the register with setpci.
  4. Test.
  5. Add the setpci command to crontab.

I'll be performing the following steps on a 2008 MacBook 4,1. Similar steps should be successful with other models.

1. Find the LPC controller via lscpi.

$ lspci | grep LPC
00:1f.0 ISA bridge: Intel Corporation 82801HM (ICH8M) LPC Interface Controller (rev 04)

Note the PCI address (00:1f.0) of our LPC Interface Controller. This will be referenced later with the setpci command.

2. Reference the LPC controller datasheet to find the register to update.

Searching the Internet for "82801HM datasheet" yields this datasheet from Intel. After opening the PDF, find the page for "AFTERG3_EN" via the Appendix A Register Bit Index (at the end of the PDF): GEN_PMCON_3—General PM Configuration 3 Register (PM—D31:F0)  

Offset Address: A4h
Default Value: 00h
Lockable: No
Attribute: R/W, R/WC
Size: 16-bit
Usage: ACPI, Legacy
Power Well: RTC

Bit: 0
Description: AFTERG3_EN — R/W. This bit determines what state to go to when power is re-applied after a power failure (G3 state). This bit is in the RTC well and is not cleared by any type of reset except writes to CF9h or RTCRST#.

0 = System will return to S0 state (boot) after power is re-applied.
1 = System will return to the S5 state (except if it was in S4, in which case it will return to S4). In the S5 state, the only enabled wake event is the Power Button or any enabled wake event that was preserved through the power failure. NOTE: Bit will be set when THRMTRIP#-based shutdown occurs.

From the above, we find that our register location is 0xA4 (A4h) with bit 0 (AFTERG3_EN) being the one that controls whether or not to power on the device after a power failure. Setting this bit to 0 will power on the machine.

3. Update the register with setpci.

Get the current value (should be 1):

$ sudo setpci -v -s 00:1f.0 0xa4.b

Set the bit to 0, per our datasheet:

$ sudo setpci -v -s 00:1f.0 0xa4.b=0

This is where I get lost. I do not see how we are setting just bit 0 to 0 with the above line. Searching online yields the same command for similar devices and different commands for others (who's manuals I cannot find online).

Verify that the bit is now set to 0:

$ sudo setpci -v -s 00:1f.0 0xa4.b

4. Test.

Shutdown the machine and disconnect the power supply.

5. Final Things

The AFTERG3_EN bit is reset to its default at reboot, so lets add the above command to our crontab (as root):

@reboot /usr/bin/setpci -s 00:1f.0 0xa4.b=0